Field of the Invention
The present invention relates to a gate shift register and a display device using the same.
Discussion of the Related Art
Recently, various flat panel displays (FPD) have been developed and entered the market. Generally, a scan driving circuit of the flat panel display sequentially supplies scan pulses to scan lines by using a gate shift register.
The gate shift register of the scan driving circuit is provided with stages including a plurality of thin film transistors (hereinafter, referred to as “TFT”). The stages are dependently connected (cascade) to sequentially generate outputs.
Each of the stages includes a Q node controlling a pull-up TFT (pull-up thin film transistor) and a Q bar (QB) node controlling a pull-down TFT (pull-down thin film transistor). Further, each of the stages includes switch TFTs oppositely charging and discharging voltages of the Q node and the QB node in response to a start signal inputted from an anterior stage, a reset signal inputted from a posterior stage, and a clock signal.
Each stage is operated by driving timing similar to FIG. 1. Referring to FIG. 1, the stage responds to the start signal to charge the Q node, and then bootstraps a potential of the Q node when the clock signal CLK is inputted to turn-on the pull-up transistor. Accordingly, the clock signal CLK is outputted as a gate output signal Vg. Subsequently, the stage responds to the reset signal to reduce the potential of the Q node from a charging level (for example, high potential level) to a discharging level (for example, low potential level) and then maintain the potential of the Q node at the low potential level during approximately one frame period.
The QB node is charged and discharged on the contrary to the Q node. That is, when the Q node has the high potential level, the QB node has the low potential level VL. When the Q node is maintained at the low potential level, the QB node is maintained at the high potential level VH. The QB node is maintained at the high potential level VH for most of one frame. Accordingly, positive bias stress (hereinafter, referred to as “PBTS”) is built up in gate electrodes of the TFTs (pull-down TFT and some switch TFTs) switched according to the potential of the QB node. The PBTS is increased in proportion to the elapse of driving time to degrade the corresponding TFTs. A threshold voltage of the TFTs is shifted in a positive (+) direction in proportion to a quantity of built PBTS. On the contrary, the threshold voltage of the TFTs is shifted in a negative (−) direction in proportion to a quantity of built NBTS (negative bias stress). Meanwhile, an a-Si:H TFT including a semiconductor layer made of an amorphous silicon material and a poly TFT including a semiconductor layer made of a polysilicon material are known as the TFT. Currently, an oxide TFT having various advantages such as a yield and process easiness is frequently used. The oxide TFT includes a metal oxide semiconductor layer to have electron mobility that is 20 to 30 times higher than that of the a-Si:H TFT.
In the scan driving circuit using the a-Si:H TFT, as shown in FIG. 2, two pull-down TFTs Tpd1 and Tpd2 connected two QB nodes QB1 and QB2, respectively, are alternately driven to reduce a degradation of the TFTs and improve reliability of the circuit. However, in the scan driving circuit using the oxide TFT, even though the structure of FIG. 2 is applied, reliability of the circuit is not improved. The reason is because the oxide TFT has a very small negative (−) shift quantity of the threshold voltage as compared to the a-Si:H TFT in a state of NBTS during an idle driving period and thus it is difficult for the threshold voltage shift caused by PBTS to be recovered to an original state.
A BTS (bias stress) characteristic of the oxide TFT is better than that of the a-Si:H TFT. However, the oxide TFT is poor in terms of a recovery characteristic by alternate driving. Accordingly, reliability of the scan driving circuit is reduced. When FIG. 2 is constituted by using the a-Si:H TFT, as shown in FIG. 3a, even though the driving time elapses, the threshold voltage of the TFTs is maintained at a constant value (clamping voltage saturation). On the contrary, when FIG. 2 is constituted by using the oxide TFT, as shown in FIG. 3b, the threshold voltage of the TFTs is shifted in the positive (+) direction according to the elapse of driving time (clamping voltage not saturation).